US 7,078,289 B2Granted

Method for fabricating a deep trench capacitor of DRAM device

AssigneeNanya Technology Corporation

InventorPing Hsu

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Abstract

A method for fabricating a deep trench capacitor of DRAM devices is disclosed. A substrate with a deep trench formed therein is provided. The trench is then doped to form a buried plate electrode serving as a first electrode of the deep trench capacitor at a lower portion of the deep trench. An isolation dielectric film is formed on interior surface of the deep trench. Subsequently, a first polysilicon layer is deposited on the isolation dielectric film to fill the deep trench. The first polysilicon layer is recessed to a first depth d1 under the surface of the substrate. A thin silicon film is deposited on the recessed first polysilicon layer and also on the exposed isolation dielectric film. A anisotropic etching is carried out to etch the thin silicon film, the subjacent recessed first polysilicon layer to a second depth d2 under the surface of the substrate. The remaining silicon film becomes a silicon spacer protecting the upper portion of the isolation dielectric film. The isolation dielectric film at the neck of the deep trench capacitor, which is not covered by the silicon spacer and the first polysilicon layer, is stripped off to expose the substrate.

Claims9

Dependent claims

A method for fabricating a trench capacitor of DRAM devices, comprising:

providing a substrate having a deep trench etched therein;
doping the deep trench to form a buried plate electrode in the substrate adjacent to a lower portion of the deep trench;
forming a node dielectric layer on interior surface of the deep trench;
depositing a first polysilicon layer in the deep trench;
recessing the first polysilicon layer to a first depth d1 in the deep trench, a top surface of the recessed first polysilicon layer and the node dielectric layer constituting a first recess;
depositing a silicon spacer layer in the first recess;
anistropic etching the silicon spacer layer and the first polysilicon layer inside the deep trench to a second depth d2, wherein the remaining silicon spacer layer becomes a spacer;
removing the node dielectric layer that is not covered by the spacer and the first polysilicon layer, thereby exposing a silicon surface at a neck portion of the deep trench,
wherein the node dielectric layer is divided into an upper dielectric section and a lower dielectric section that serves as a capacitor dielectric of the trench capacitor;
oxidizing the spacer, the silicon surface at the neck portion of the deep trench and an upper portion of the first polysilicon layer, thereby forming a silicon oxide layer;
and
etching away the silicon oxide layer.

9 more elements

Dependencies are inferred from the claim text.