Method for patterning a mask layer and semiconductor product

Abstract

During the lithographic exposure of layers to be patterned on semiconductor products, use is made of masks whose mask pattern is imaged on a reduced scale, with the aid of an imaging optical arrangement, onto the layer to be patterned. After the patterning of the mask layer, a membrane is placed onto the mask with a membrane holder in order to keep dust or other contaminants in the air away from the plane of the mask layer during the exposure. When the mask and the membrane holder are mounted, manufacturing-dictated height deviations thereof lead to subsequent distortion of the mask structure of the mask layer, which is transferred to the semiconductor product by means of the lithography. Here, the height tolerances of the mask and of the membrane holder are measured and a corrected mask pattern is calculated, the mask structures of which are offset in the lateral direction such that the mask distortions resulting from the mounting of the membrane holder are compensated for. The deformations of the mask and of the membrane holder perpendicular to the mask plane are compensated for by lateral displacements of the mask structures of the corrected mask pattern.

Dependencies are inferred from the claim text.