Method of manufacturing antenna proximity lines

A method of manufacturing an integrated circuit comprising:

• forming a transistor level containing logic elements over a semiconductor substrate, said transistor level including semiconductor substrate contacts, said semiconductor substrate contacts having direct contact with said semiconductor substrate, said transistor level also including logic element contacts, said logic element contacts having direct contact with said logic elements;
• forming a first dielectric layer over said transistor level;
• etching said first dielectric layer to form voids for first level metal interconnects and first level antenna proximity lines;
• and
• forming said first level metal interconnects and said first level antenna proximity lines, said first level antenna proximity lines being coupled to said semiconductor substrate contacts, and said first level metal interconnects being coupled to said logic element contacts.