Method for limiting slip lines in a semiconductor substrate
AssigneeS.O.I.Tec Silicon on Insulator Technologies
InventorEric Neyret
Life of this patent
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Abstract
A method for limiting slip lines in a semiconductor substrate including a support layer and a useful semiconductor layer that is transferred to the support layer. The method includes precipitating at least a portion of interstitial oxygen in the support layer by a series of heat treatments conducted after bonding of the useful semiconductor layer to the support layer. The heat treatments occur at a temperature and a time sufficient to reduce the generation of slip lines therein.
Claims15
A method for limiting slip lines in a semiconductor substrate comprising a support layer and a useful semiconductor layer that is transferred to the support layer, which comprises precipitating at least a portion of interstitial oxygen in the support layer by a series of heat treatments conducted after bonding of the useful semiconductor layer to the support layer at a temperature and a time sufficient to reduce the generation of slip lines therein, wherein the useful semiconductor layer is bonded to the support layer by molecular bonding.
Dependencies are inferred from the claim text.