Extraction of drain junction overlap with the gate and the channel length for ultra-small CMOS devices with ultra-thin gate oxides

A method for determining a junction overlap (LSDJO) and a channel length (LCH) of a small device on a substrate, the small device having a gate, a source and a drain, wherein a channel is defined between the source and the drain of the small device, the method comprising:

• providing a large reference device on the substrate, the reference device having a gate, a source and a drain, wherein a channel of known length (LCH(ref)) is defined between the source and the drain of the reference device;
• grounding the source and the drain of the reference device and the substrate;
• applying a predetermined gate voltage (VG) to the gate of the reference device;
• measuring the current (IGC(ref)) between the gate and the channel of the reference device;
• grounding the source and the drain of the small device and the substrate;
• applying the predetermined gate voltage (VG) to the gate of the small device;
• measuring the current (IGC(ref)) between the gate and the channel of the small device;
• floating the substrate and one of the source or the drain of the small device;
• applying a predetermined drain voltage (VD) to the respective source or drain of the small device which is not floating;
• measuring the current (IGD) between the gate of the small device and the respective source or drain of the small device which is not floating;
• calculating the overlap (LSDJO) of the respective source or drain by using the known channel length (LCH(ref)) of the reference device, the measured current (IGD) between the gate and the respective source or drain of the small device, and the measured current (IGC(ref)) between the gate and the channel of the reference device;
• and
• calculating the channel length (LCH) of the small device by using the known channel length (LCH(ref)) of the reference device, the measured current (IGC) between the gate and the channel of the small device, the measured current (IGC(ref)) between the gate and the channel of the large device, and the calculated overlap (LSDJO).