Metal planarization system

A method for forming planarized copper structures within a semiconductor device, the method comprising the steps of:

• depositing copper in at least patterned trenches and vias of the semiconductor device,
• removing the deposited copper from surfaces of other structures on the semiconductor device by chemical mechanical planarization, thereby dishing upper surfaces of the deposited copper remaining within the patterned trenches and vias of the semiconductor device,
• depositing amorphous silicon using plasma enhanced chemical vapor deposition, the amorphous silicon deposited in at least the dished upper surfaces of the deposited copper remaining within the patterned trenches and vias of the semiconductor device, where the amorphous silicon is deposited to a thickness that at least fills the dished upper surfaces of the deposited copper remaining within the patterned trenches and vias of the semiconductor device,
• removing as necessary the amorphous silicon from the other structures on the semiconductor device,
• planarizing the amorphous silicon using chemical mechanical planarization,
• selectively replacing with copper only the amorphous silicon within the dished upper surfaces of the copper remaining within the patterned trenches and vias of the semiconductor device by dipping in a displacement plating solution, and thereby planarizing the dished upper surfaces of the copper remaining within the patterned trenches and vias of the semiconductor device,
• curing at least the copper that replaced the amorphous silicon with an anneal,
• removing any excess amount of copper that overburdens the dished upper surfaces of the copper remaining within the patterned trenches and vias of the semiconductor device, and
• annealing the planarized copper structures.