US 6,556,409 B1 · Integrated circuit including ESD circuits for a multi-chip module and a method therefor

Abstract

An integrated circuit that includes I/O circuitry that may or may not be protected from ESD damage. The protection from ESD damage may be selectively deactivated or activated or may not be present at all in one or more of the I/O circuits. In use, the integrated circuit may be coupled to another integrated circuit to form a multi-chip module where the ESD protection for the I/O circuitry between the modules is deactivated or not present. This is advantageous because the likelihood of ESD damage to this I/O circuitry is reduced once the multi-chip module is formed. It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.

Claims20

Dependent claims

A device comprising:

a first electrostatic discharge (ESD) protection circuit configured to protect a first input/output circuit of said device, wherein said first input/output circuit is configured to couple said device to a second device;
a second ESD protection circuit configured to protect a second input/output circuit of said device;
and
circuitry adapted to selectively enable and disable said first ESD protection circuit.

1 more element

Dependencies are inferred from the claim text.

Integrated circuit including ESD circuits for a multi-chip module and a method therefor

Life of this patent

Integrated circuit including ESD circuits for a multi-chip module and a method therefor

Life of this patent

Abstract

Claims20