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US 6,309,980 B1Granted
Semiconductor integrated circuit arrangement fabrication method
AssigneeHitachi, Ltd.
InventorsTakafumi Tokunaga, Sadayuki Okudaira, Tatsumi Mizutani, Kazutami Tago, Hideyuki Kazumi, Ken Yoshioka
Life of this patent
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Abstract
To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited to a metastable state in a plasma and a flon gas to interact with each other and selectively obtaining desired dissociated species.
Claims61
An integrated circuit device fabrication method, comprising the steps of:
- (a) forming a first insulating film including a silicon oxide film over a first major surface of a water, which major surface has a patterned preceding film;
- (b) forming a first film pattern including a second insulating film over the first insulating film;
- (c) patterning the first insulating film with the first film pattern by performing ion assisted etching to the first major surface under a mixed ambient gas with three or more carbon atoms, and an inert gas not less than 50% thereof.
An integrated circuit device fabrication method, comprising the steps of:
- (a) forming a first insulating film including a silicon nitride film including a silicon nitride film over a first major surface of a wafer, which major surface has a patterned preceding film;
- (b) forming a first film pattern including a second insulating film over the first insulating film;
- (c) patterning the first insulating film with the first film pattern ion assisted etching to the first major surface under a mixed ambient gas including a reaction gas containing a fluorocarbon gas, and an inert gas not less than 80% thereof.
An integrated circuit device fabrication method, comprising the steps of:
- (a) forming a first insulating film including a silicon nitride film over a first major surface of a wafer, which major surface has a patterned preceding film;
- (b) forming a second insulating film including a silicon oxide film over the first insulating film;
- (c) forming a first film pattern having a hole pattern over the second insulating film;
- (d) forming a hole into the second insulating film down to the first insulating film by performing ion assisted etching to the first major surface with the first film pattern using the silicon nitride film as an etching stopper under a mixed ambient gas including a reaction gas containing a cyclic perfluorocarbon gas with three or more carbon atoms, and an inert gas not less than 50% thereof;
- (e) extending the hole into the first insulating film own to an underlying layer thereof by performing ion assisted etching to the first major surface under a mixed ambient gas including a reaction gas containing a fluorocarbon gas, and an inert gas not less than 80% thereof.
2 more elements
An integrated circuit device fabrication method, comprising the steps of:
- (a) forming a first insulating film including a silicon nitride film over a first major surface of a wafer, which major surface has a patterned preceding film;
- (b) forming a second insulating film including a silicon oxide film over the first insulating film;
- (c) forming a first film pattern having a hole pattern over the second insulating film;
- (d) forming a hole into the second insulating film down to the first insulating film by performing dry etching to the first major surface with the first film pattern using the silicon nitride film as an etching stopper under a mixed ambient gas including a reaction gas containing a cyclic perfluorocarbon gas with three or more carbon atoms, and an inert gas not less than 50% thereof;
- (e) extending the hole into the first insulating film down to an underlying layer thereof by performing ion assisted etching to the first major surface under a mixed ambient gas including a reaction gas containing a fluorocarbon gas, and an inert gas not less than 80% thereof.
2 more elements
An integrated circuit device fabrication method, comprising the steps of:
- (a) forming a first insulating film including a silicon nitride film over a first major surface of a wafer, which major surface has first and second patterned gate electrodes disposed adjacent to each other;
- (b) forming a second insulating film including a silicon oxide film over the first insulating film;
- (c) forming a first film pattern having a hole pattern over the second insulating film;
- (d) forming a hole into the second insulating film down to the first insulating film by performing dry etching to the first major surface with the first film pattern using the silicon nitride film as an etching stopper under a mixed ambient gas including a reaction gas containing a cyclic perfluorocarbon gas with three or more carbon atoms, and an inert gas not less than 50% thereof;
- (e) extending the hole into the first insulating film down to an underlying layer thereof between the first and second gate electrodes by performing dry etching to the first major surface under a mixed ambient gas including a reaction gas containing a fluorocarbon gas, and an inert gas not less than 80% thereof.
2 more elements
An integrated circuit device fabrication method, comprising the steps of:
- (a) forming a first insulating film including a silicon nitride film over a first patterned gate electrode and an isolation insulating region disposed adjacent to each other;
- (b) forming a second insulating film including a silicon oxide film over the first insulating film;
- (c) forming a first film pattern having a hole pattern over the second insulating film;
- (d) forming a hole into the second insulating film down to the first insulating film by performing dry etching to the first major surface with the first film pattern using the silicon nitride film as an etching stopper under a mixed ambient gas including a reaction gas containing a cyclic perfluorocarbon gas with three or more carbon atoms, and an inert gas not less than 50% thereof;
- (e) extending the hole into the first insulating film down to an underlying layer thereof between the first gate electrode and the isolation insulating region by performing dry etching to the first major surface under a mixed ambient gas including a reaction gas containing a fluorocarbon gas and an inert gas not less than 80% thereof.
2 more elements
An integrated circuit device fabrication method, comprising the steps of:
- (a) forming a first insulating film including a silicon nitride film over a first major surface of a wafer, which major surface has a patterned preceding film;
- (b) forming a second insulating film including a silicon oxide film over the film insulating film;
- (c) forming a first film pattern having a hole pattern over the second insulating film;
- (d) forming a hole into the second insulating film down to the first insulating film by performing ion assisted etching to the first major surface with the first film pattern using the silicon nitride film as an etching stopper under a mixed ambient gas including a reaction gas containing a cyclic perfluorocarbon gas with three or more carbon atoms, and an inert gas not less than 50% thereof;
- (e) extending the hole into the first insulating film down to an underlying layer thereof by performing dry etching to the first major surface under an ambient gas.
2 more elements
An integrated circuit device fabrication method, comprising the steps of:
- (a) forming a first insulating film including a silicon nitride film over a first major surface of a wafer, which major surface has a patterned preceding film;
- (b) forming a second insulating film including a silicon oxide film over the first insulating film;
- (c) forming a first film pattern having a hole pattern over the second insulating film;
- (d) forming a hole into the second insulating film down to the first insulating film by performing dry etching to the first major surface with the first film pattern using the silicon nitride film as an etching stopper under an ambient gas;
- (e) extending the hole into the first insulating film down to an underlying layer thereof by performing ion assisted etching to the first major surface under a mixed ambient gas including a reaction gas containing a fluorocarbon gas, and inert gas not less than 80% thereof.
2 more elements
An integrated circuit device fabrication method, comprising the steps of:
- (a) forming a first insulating film including a silicon nitride film over a first major surface of a wafer, which major surface has a patterned preceding film;
- (b) forming a second insulating film including a silicon oxide film over the first insulating film;
- (c) forming a first film pattern having a hole pattern over the second insulating film;
- (d) forming a hole into the second insulating film down to the first insulating film by performing dry etching to the first major surface with the first film pattern using the silicon nitride film as an etching stopper under a mixed ambient gas including a reaction gas containing a cyclic perfluorocarbon gas with three or more carbon atoms, and an inert gas not less than 50% thereof;
- (e) extending the hole into the first insulating film down to an underlying layer thereof by performing dry etching to the first major surface under an ambient gas.
2 more elements
An integrated circuit device fabrication method, comprising the steps of:
- (a) forming a first insulating film including a silicon nitride film over a first major surface of a wafer, which major surface has a patterned preceding film;
- (b) forming a second insulating film including a silicon oxide film over the first insulating film;
- (c) forming a first film pattern having a hole pattern over the second insulating film;
- (d) forming a hole into the second insulating film down to the first insulating film by performing dry etching to the first major surface with the first film pattern using the silicon nitride film as an etching stopper under an ambient gas;
- (e) extending the hole into the first insulating film down to an underlying layer thereof by performing dry etching to the first major surface under a mixed ambient gas including a reaction gas containing a fluorocarbon gas, and on inert gas not less than 80% thereof.
2 more elements
Dependencies are inferred from the claim text.