Semiconductor device with multilayered gate structure
AssigneeNEC Corporation
InventorKiyotaka Imai
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Abstract
A semiconductor device is provided which is capable of suppressing an increase in the layer resistance of the gate electrode and preventing an increase of the contact resistance of the gate electrode with the silicide layer. The above properties of the semiconductor device are provided by forming the gate electrode comprising multiple layers, and the lowermost layer of the gate electrode is doped with an impurity, and other upper layers are formed undoped.
Claims4
A semiconductor device having a gate electrode formed in a multiple layered structure, wherein the lowermost layer of the gate electrode is doped with an impurity, and one of the two uppermost layers of the gate electrode is an undoped polycrystalline silicon layer.
Dependencies are inferred from the claim text.