Multilayer capacitor structure having an array of concentric ring-shaped plates for deep sub-micron CMOS

A capacitor comprising:

• a first conductor level of electrically conductive concentric lines;
• at least a second conductor level of electrically conductive concentric lines, the conductive lines of the first and at least second levels arranged in concentric stacks;
• a dielectric material disposed between the first and second conductor levels and between the concentric conductive lines in each of the levels;
• at least one electrically conductive via electrically connecting the conductive lines in each stack, thereby forming an array of concentric capacitor plates, each conductive via extending through the dielectric material between the first and second conductor levels;
• and
• first and second terminals having opposite electrical polarities;
• wherein the array of concentric capacitor plates are electrically connected in an alternating manner to the terminals of opposite polarity so that capacitance is generated between adjacent plates of the array.