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AssigneeVantis Corporation
InventorsHyeon-Seag Kim, Sunil D. Mehta
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This invention provides methods for reducing the mechanical stresses within dielectric layers filling the gaps in shallow trench isolation (STI) regions on semiconductor wafers. The methods include the sequential deposition of alternating layers of dielectric materials having tensile stress and compressive stress, respectively. The invention also provides methods for adjusting the residual stress in a dielectric film by controlling the relative thicknesses of the alternating layers of dielectric material to provide bilayers having minimal overall stress. Additionally, the invention provides semiconductor devices having the reduced stress dielectric materials within the shallow isolation trenches of the semiconductor wafer. The reduction in stress within and between trenches decreases defects in the shallow isolation materials and thereby decreases source-drain and trench—trench short circuiting. The improved electrical and mechanical properties of the shallow trench filling materials makes practical the manufacture of more reliable, smaller semiconductor devices.
A method for providing a dielectric material having reduced stress in a shallow isolation trench on a semiconductor wafer, said method comprising the steps of:
A method for providing a dielectric material having reduced stress in a shallow isolation trench on a semiconductor wafer, said method comprising the steps of:
A method for providing a dielectric material having reduced stress within a shallow isolation trench on a semiconductor wafer, comprising the steps of:
A method for providing a dielectric material having reduced stress in a shallow isolation trench on a semiconductor wafer, said method comprising the steps of:
Dependencies are inferred from the claim text.