Method for manufacturing a metal oxide semiconductor (MOS)-based structure

A method for preventing devices in a wafer from being lost during the subsequent etching process, comprising the steps of:

• forming an etching stop layer over said wafer having a field oxide, a gate and a lightly doped region;
• forming an insulating layer over said etching stop layer;
• partially removing said insulating layer to form spacers alongside said gate, wherein a ratio of the etch selectivity of said insulating layer to that of said etching stop layer is relatively high enough to protect said field oxide and said lightly doped region from being etched while forming said spacers;
• implanting a dopant into a portion of said lightly doped region uncovered by said spacers to form a heavily doped region;
• forming an intermediate layer over said etching stop layer, said spacers, and said gate;
• partially removing said intermediate layer to form a contact window and to expose a portion of said etching stop layer;
• removing said portion of said etching stop layer to expose a portion of an oxide layer formed on said wafer in said contact window;
• performing a reflow process of said intermediate layer;
• and
• removing said portion of said oxide layer to expose said heavily doped region in said contact window and forming a metal layer in said contact window and over said exposed heavily doped region.