Method and structure for an oxide layer overlaying an oxidation-resistant layer

A method used during the formation of a semiconductor device comprising the following steps:

• forming a floating gate layer over a semiconductor wafer substrate;
• forming a first oxide layer over and contacting said floating gate layer;
• forming an oxidation-resistant layer over and contacting said first oxide layer wherein a first portion of said oxidation-resistant layer oxidizes more readily than a second portion of said oxidation-resistant layer;
• oxidizing said first portion of said oxidation-resistant layer to form a second oxide layer;
• and
• forming a control gate over and contacting said second oxide layer.

A method used during the formation of a semiconductor device comprising the following steps:

• forming a conductive floating gate layer over a semiconductor wafer substrate;
• forming an oxidation-resistant layer over said floating gate layer;
• forming an oxidizable layer over said oxidation-resistant layer;
• oxidizing said oxidizable layer;
• forming a conductive control gate layer over said oxidizable layer;
• and
• etching said floating gate layer and said control gate layer to define a floating gate and a control gate with said oxidation-resistant layer and said oxidized oxidizable layer interposed therebetween.

A method used during the formation of a semiconductor device comprising the following steps:

• providing a semiconductor wafer substrate assembly comprising a semiconductor wafer;
• placing said wafer substrate assembly in a furnace;
• providing a temperature of between about 400° C. and about 800° C. in said furnace;
• introducing dichlorosilane gas and ammonia gas into said furnace to form a first silicon nitride layer portion having a first concentration of silicon;
• subsequent to said step of introducing dichlorosilane gas and ammonia gas into said furnace, increasing a ratio of said dichlorosilane gas relative to said ammonia gas to form a second silicon nitride layer portion having a second concentration of silicon which is greater than said first concentration;
• and
• oxidizing said second silicon nitride layer portion and leaving said first silicon nitride layer portion unoxidized.

A method used during the formation of a semiconductor device comprising the following steps:

• providing a semiconductor wafer substrate assembly comprising a semiconductor wafer, a gate oxide layer over said wafer, and a floating gate layer over said gate oxide layer;
• placing said wafer substrate assembly into a chamber;
• increasing a temperature within said chamber to between about 400° C. and about 800° C.;
• introducing a silicon-containing gas into said chamber at a flow rate of between about 20 sccm and about 100 sccm for about 20 minutes while introducing ammonia into said chamber at a flow rate of between about 150 sccm and about 300 sccm for about 20 minutes and exposing said wafer substrate assembly to said dichlorosilane gas and said ammonia gas;
• subsequent to said step of introducing said silicon-containing gas and said ammonia into said chamber for about 20 minutes, increasing a ratio of said silicon-containing gas relative to said ammonia gas, thereby forming a siliconized nitride layer on said wafer substrate assembly;
• and
• oxidizing a first portion of said siliconized nitride layer while leaving a second portion of said siliconized nitride layer unoxidized.

A method used during the formation of a semiconductor device comprising:

• forming a first transistor gate layer;
• forming a siliconized nitride layer having a first portion with a first silicon concentration and a second portion with a second silicon concentration higher than said first concentration overlying said first portion;
• oxidizing said second portion of said siliconized nitride layer to forming an oxide layer;
• forming a second transistor gate layer over and contacting said oxidized second portion;
• and
• etching said first and second transistor gate layers to form first and second transistor gates.

A method for forming a transistor having two gates comprising the following steps:

• forming a first transistor gate layer;
• forming a siliconized nitride layer over said first transistor gate layer, said siliconized nitride layer comprising a first siliconized nitride layer portion having a first silicon concentration and a second siliconized nitride layer portion having a second silicon concentration overlying said first portion, wherein said second concentration is higher than said first concentration;
• oxidizing said siliconized nitride layer to form an oxide layer;
• and
• forming a second transistor gate layer over said oxide layer.