Multilayer quadruple gate field effect transistor structure for use in integrated circuit devices

A multilayer structure for containing a plurality of transistors, the structure being manufactured by a method comprising:

• providing a first integrated circuit including a first insulative layer, a second insulative layer, a third insulative layer, a first semiconductor substrate, a first conductive layer, and a second conductive layer, the first conductive layer being below the first semiconductor substrate, the first conductive layer being a first gate for a first transistor associated with the first semiconductor substrate, the first conductive layer being electrically coupled to a first via and being disposed between the first semiconductor substrate and the first insulative layer, the second insulative layer being above the first semiconductor substrate and below the second conductive layer, the first via extending through the second insulative layer and connecting to the second conductive layer, the second conductive layer being below the third insulative layer;
• providing a second integrated circuit, including a fourth insulative layer, a fifth insulative layer, a second semiconductor substrate, and a third conductive layer, the third conductive layer being below the second semiconductor substrate, the third conductive layer being a second gate for a second transistor associated with the second semiconductor substrate, wherein a second via extends through the fifth insulative layer, the fifth insulative layer being above the second substrate;
• attaching the first integrated circuit to the second integrated circuit;
• and
• providing a third via through the third insulative layer, the fourth insulative layer and the fifth insulative layer, the third via being coupled to the second conductive layer;
• and
• providing a fourth conductive layer above the fifth insulative layer, the fourth conductive layer being coupled to the second and third vias.