Method for forming deep trench capacitor under a shallow trench isolation structure

A method for forming a deep trench capacitor under shallow trench isolation (STI) structure, the method comprising:

• providing a substrate, wherein the substrate sequentially has a pad oxide layer, a first mask layer, and a second mask layer;
• forming a photoresist layer on the second mask layer, wherein the photoresist layer relatively has a thicker portion and a thinner portion, the thinner portion is located on a predetermined location to be formed an STI structure thereunder, and a photoresist opening is formed between the thicker portion and the thinner portion to expose the second mask layer;
• etching the second mask layer, the first mask layer, the pad oxide layer, and the substrate to form an opening under the photoresist opening, wherein a lower portion of the opening in the substrate is a deep trench;
• removing the photoresist layer, wherein the second mask layer under the thinner portion of the photoresist layer is also removed by a self-aligned manner;
• forming a first buried plate diffused in the substrate, surrounding a lower portion of the deep trench;
• forming a capacitor dielectric layer and a polysilicon electrode, filling into a lower portion of the deep trench;
• forming a dielectric collar layer on a sidewall of the deep trench above the polysilicon electrode, wherein the dielectric collar layer covers an exposed surface of the capacitor dielectric layer within the deep trench but not fully covers the sidewall of the deep trench;
• performing implantation to form a second buried plate region inside the substrate with a distance to a substrate surface, whereby the second buried plate region has electrical contact with the first buried plate;
• forming a selective growth polysilicon layer, filling into the deep trench of the opening with a height of the selective growth polysilicon layer higher than the substrate surface;
• performing a first self-aligned etching process, using the second mask layer as an etching mask, to remove portions of the first mask layer and the pad oxide layer, thereby exposing a portion of the substrate;
• performing a second self-aligned etching process, using the second mask layer as an etching mask, simultaneously etching the selective growth polysilicon layer and the exposed portion of the substrate, whereby an STI opening is formed and exposes a portion of the collar dielectric layer at a side originally having contact with the deep trench;
• and
• forming the STI structure, filling into the STI opening.