Method for buried plate formation in deep trench capacitors
AssigneeInternational Business Machines Corporation
InventorsPhilippe Coronel, David Cruau, Francois Leverd, Renzo Maccagnan, Eric Mass
Life of this patent
Estimating the term…
Abstract
An improved method of forming the buried plate regions in deep trench capacitors used in DRAM memory semiconductor circuits in which the polymer used in the deep trench is etched down to the desired depth in a reactive ion etch tool using an O2/CF4 chemistry. Since optical/interferometric etch end-point detection system can be used to monitor the etch back step in its totality, the quantity of the polymer remaining in deep trenches can be very accurately controlled, which in turn will produce a well controlled buried plate region during the out-diffusion step of the arsenic dopant contained in the arsenic doped silicon glass layer.
Claims6
Method of forming a buried plate region in a deep trench of a silicon substrate comprising the steps of:
- a. providing a structure comprised of a silicon substrate coated by a patterned SiO2 Si3N4 pad layer to define deep trenches formed therein by etching;
- b. coating the interior walls of said deep trench with a N type doped glass layer and an overlying SiO2 passivation layer;
- c. depositing a layer of polymer dispersed in a solvent having high filling/planarizing capability and being RIE etchable to fill said deep trench in excess;
- d. baking the polymer to evacuate the solvent contained therein to produce a highly planar surface;
- e. RIE etching the structure to etch the polymer into the deep trench down to the desired depth;
- f. removing the exposed portion of the N type doped glass layer and overlying SiO2 passivation layer in said deep trench;
- g. out-diffusing the N type dopant in said substrate to form the buried plate region;
- and
- h. removing the polymer remaining in said deep trench.
Dependencies are inferred from the claim text.