US 6,271,106 B1 · Method of manufacturing a semiconductor component

Abstract

A method of manufacturing a semiconductor component includes sequentially disposing a first electrically conductive layer (130), a dielectric layer (140), and a sacrificial layer (150) over a substrate (110). An etch mask is used to defined a gate stack (210) comprised of the sacrificial layer (150), the dielectric layer, and the first electrically conductive layer. Another dielectric layer (310) is deposited over the substrate (110) and the gate stack (210). This second dielectric layer (310) is planarized to expose the sacrificial layer (150). The sacrificial layer (150) of the gate stack (210) and the dielectric layer (140) of the gate stack (210) are sequentially removed, and another electrically conductive layer (740) is deposited over the first electrically conductive layer of the gate stack to form a gate electrode made of, among other features, two electrically conductive layers.

Claims15

Dependent claims

A method of manufacturing a semiconductor component comprising:

providing a substrate;
disposing a first layer over the substrate;
disposing an etch stop layer over the first layer;
disposing a sacrificial layer over the etch stop layer;
patterning the sacrificial layer, the etch stop layer, and the first layer to form a gate stack comprising a portion of the first layer, a portion of the etch stop layer, and a portion of the sacrificial layer;
disposing a dielectric layer over the substrate and the gate stack;
exposing the portion of the sacrificial layer after disposing the dielectric layer;
removing the portion of the sacrificial layer to create a via in the dielectric layer;
disposing a barrier layer on the first layer in the via wherein the barrier layer does not extend onto sidewalls of the via;
disposing a conductor layer onto the barrier layer;
and
disposing a metal layer onto the conductor layer.

9 more elements

A method of manufacturing a semiconductor component comprising:

providing a silicon substrate;
growing a first silicon dioxide layer over the silicon substrate;
depositing a first polysilicon layer over the first silicon dioxide layer, the first polysilicon layer being doped;
growing a second silicon dioxide layer over the first polysilicon layer;
depositing a second polysilicon layer over the second silicon dioxide layer;
sequentially etching the second polysilicon layer, the second silicon dioxide layer, and the first polysilicon layer to form a gate structure over the silicon substrate after depositing the second polysilicon layer, the gate structure comprised of a portion of the second polysilicon layer defined by an etch mask, a portion of the second silicon dioxide layer defined by the etch mask, and a portion of the first polysilicon layer defined by the etch mask;
depositing a third silicon dioxide layer over the silicon substrate and the gate structure;
chemically-mechanically polishing the third silicon dioxide layer to expose the portion of the second polysilicon layer;
removing the portion of the second polysilicon layer to form a via in the third silicon dioxide layer;
removing the portion of the second silicon dioxide layer after removing the portion of the second polysilicon layer to extend the via deeper into the third silicon dioxide layer and to expose the portion of the first polysilicon layer;
forming a silicide in the via;
depositing a conductor layer onto the silicide in the via before depositing the metal;
and
depositing a barrier layer onto the conductor layer in the via before depositing the metal;
and
depositing a metal onto the barrier layer.

13 more elements

Dependencies are inferred from the claim text.

Method of manufacturing a semiconductor component

Life of this patent

Method of manufacturing a semiconductor component

Life of this patent

Abstract

Claims15