US 6,207,565 B1 · Integrated process for ashing resist and treating silicon after masked spacer etch

Abstract

A method for preparing a semiconductor substrate for subsequent silicide formation. In one embodiment, the present invention subjects the semiconductor substrate to an ashing environment. In the present embodiment, the ashing environment is comprised of H2O vapor, and a gaseous fluorocarbon or a fluorinated hydrocarbon gas. In so doing, contaminants on the semiconductor substrate are removed. Next, the present invention subjects a mask covering a polysilicon stack to a mask-removal ashing environment. In the present embodiment, the mask-removal ashing environment is comprised of an O2 plasma. In so doing, the mask covering the polysilicon stack is removed. As a result, the semiconductor substrate and the top surface of the polysilicon stack are prepared for subsequent silicide formation thereon.

Claims14

Dependent claims

A method of preparing a semiconductor substrate for subsequent silicide formation wherein said semiconductor substrate has photomask material disposed thereover for preventing the removal of oxide from certain regions of said semiconductor substrate, said method comprising the steps of:

a) exposing said semiconductor substrate to an oxide etch process such that said oxide is selectively removed from portions of said semiconductor substrate;
b) after said step a), exposing said semiconductor substrate to an ashing environment, said ashing environment removing contaminants from at least said portions of said substrate from which said oxide was removed in said step a);
and
c) after said step b), exposing said semiconductor substrate to a photomask removing environment, said photomask removing environment removing said photomask material from above said semiconductor substrate, said photomask material previously deposited above selected regions of said semiconductor substrate, said step b) performed prior to said step c) such that silicide formation impeding residues are removed from the surface of said semiconductor substrate prior to depositing a metal to be used when forming a silicide on said semiconductor substrate.

1 more element

a) exposing said semiconductor substrate to an oxide etch process such that oxide is selectively removed from portions of said semiconductor substrate;
b) after said step a), exposing said semiconductor substrate to a photomask removing environment, said photomask removing environment removing said photomask material from above said semiconductor substrate, said photomask material previously deposited above selected regions of said semiconductor substrate;
c) after said step b), exposing said semiconductor substrate to an oxide removal environment, said oxide removal environment removing contaminants formed during said step b);
and
d) after said step c), exposing said semiconductor substrate to an ashing environment, said ashing environment removing contaminants from at least said portions of said substrate from which said oxide was removed in said step a), said step b) performed prior to said step c) such that silicide formation impeding residues are removed from the surface of said semiconductor substrate prior to depositing a metal to be used when forming a silicide on said semiconductor substrate.

2 more elements

Dependencies are inferred from the claim text.

Integrated process for ashing resist and treating silicon after masked spacer etch

Life of this patent

Integrated process for ashing resist and treating silicon after masked spacer etch

Life of this patent

Abstract

Claims14