US 6,188,135 B1 · Copper interconnect with top barrier layer

Abstract

A structure and method for making copper interconnections in an integrated circuit are described. The structure is a damascene copper connector whose upper surface is coplanar with the upper surface of the insulating layer in which it is embedded. Out-diffusion of copper from the connector is prevented by two barrier layers. One is located at the interface between the connector and the insulating layer while the second barrier is an insulating layer which covers the upper surface of the connector. The damascene process involves filling a trench in the surface of the insulator with copper and then removing the excess by chem.-mech. polishing. Since photoresist is never in direct contact with the copper the problem of copper oxidation during resist ashing has been effectively eliminated.

Claims31

Dependent claims

An electrical connector in an integrated circuit comprising:

a silicon substrate,
a first insulating layer, having a top surface and a bottom surface formed on said substrate,
a trench formed in said first insulating layer having a top, walls and a bottom trench surface,
a first barrier layer formed in said trench on said walls and on said bottom trench surface, said first barrier layer being thin with respect to the depth of said trench,
a copper connector formed in said trench on said first barrier layer, said copper connector having an upper surface and a lower surface formed such that said top surface of said copper connector is at the level of the top surface of said first insulating layer and said lower surface of said copper connector is a distance above the bottom surface of said first insulating layer, whereby said first interface is formed between said copper connector and said first insulating layer,
said first barrier layer comprising an interface between said copper connector and said first insulating layer,
a second, insulating, barrier layer formed on said upper surface of said copper connector and formed on said top surface of said first insulating layer, and
a second insulating layer formed on said second barrier layer.

5 more elements

An electrical connector in an integrated circuit comprising:

a silicon substrate,
a first insulating layer, having a top surface and a bottom surface formed on said substrate,
a trench formed in said first insulating layer having a top, walls and a bottom trench surface,
a first barrier layer formed in said trench on said walls and on said bottom trench surface, said first barrier layer being thin with respect to the depth of said trench,
a copper connector formed in said trench on said first barrier layer, said copper connector having an upper surface and a lower surface formed such that said top surface of said copper connector is at the level of the top surface of said first insulating layer and said lower surface of said copper connector is a distance above the bottom surface of said first insulating layer, whereby said first interface is formed between said copper connector and said first insulating layer,
said first barrier layer comprising an interface between said copper connector and said first insulating layer,
a second, insulating, barrier layer formed on said upper surface of said copper connector and formed on said top surface of said first insulating layer,
a second insulating layer formed on said second barrier layer,
said first insulating layer is deposited to a thickness between about 5,000 Å and about 20,000 Å,
the depth of said trench is between about 4,000 Å and about 12,000 Å, and
the distance between the lower surfaces of said copper connector and said first insulating layer is between about 4,000 Å and about 8,000 Å.

8 more elements

Dependencies are inferred from the claim text.

Copper interconnect with top barrier layer

Life of this patent

Copper interconnect with top barrier layer

Life of this patent

Abstract

Claims31