Disposition tool for factory process control
AssigneeAdvanced Micro Devices, Inc.
InventorsPaul J. Steffan, Ming Chun Chen
Life of this patent
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Abstract
A method of manufacturing semiconductor wafers using a simulation tool to determine a set of predicted wafer electrical test parameters. The set of predicted wafer electrical test parameters are compared with wafer electrical test specifications tabulated for each process during the manufacturing process. During the comparison, it is determined whether the predicted wafer electrical test parameters are within the specifications for the process and circuit simulations are then conducted using the predicted wafer electrical test parameters. Device performance is predicted from the circuit simulations and the disposition of the wafer lot is determined utilizing tabulated from a disposition performance table.
Claims2
A method of manufacturing semiconductor wafers, the method comprising:
- starting a wafer lot in a process;
- setting process parameters for the process and running the process;
- measuring in-line critical dimensions after completion of the process and determining a set of predicted wafer electrical test parameters;
- comparing the set of predicted wafer electrical test parameters with wafer electrical test specifications tabulated for the process;
- determining whether the set of predicted wafer electrical test parameters are within the wafer electric test specifications tabulated for the process;
- performing circuit simulations using the set of predicted wafer electrical test parameters;
- predicting device performance based on the circuit simulations;
- and
- determining a disposition from the predicted device performance data.
Dependencies are inferred from the claim text.