Semiconductor device and control method thereof
AssigneeKabushiki Kaisha Toshiba
InventorsIchiro Omura, Wolfgang Fichtner, Hiromichi Ohashi, Tsuneo Ogura, Hideaki Ninomiya
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AssigneeKabushiki Kaisha Toshiba
InventorsIchiro Omura, Wolfgang Fichtner, Hiromichi Ohashi, Tsuneo Ogura, Hideaki Ninomiya
Estimating the term…
Disclosed is a semiconductor device capable of stabilizing a gate voltage at high voltage and high current, protecting the device from breakdown by preventing current nonuniformity and oscillations and the like, thereby improving reliability, and a method for controlling the semiconductor device. The semiconductor device comprises an n-type base layer, a p-type emitter layer, which is formed on a surface of the n-type base layer, a collector electrode, formed on a surface of the p-type emitter layer, a p-type base layer, formed on a surface on the n-type base layer which is opposite to the p-type emitter layer, an n-type source layer, formed in a surface of the p-type base layer, an emitter electrode, formed on the n-type source layer and the p-type base layer, and a gate electrode, contacting the n-type source layer, the p-type base layer and the n-type base layer, with a gate insulating film interposed therebetween, wherein when a voltage is applied between the collector electrode and the emitter electrode, the capacitance of the gate electrode is always a positive value or zero.
A semiconductor device comprising:
A semiconductor device comprising:
A semiconductor device comprising:
Dependencies are inferred from the claim text.