Process for forming a capacitor incorporated in a semiconductor device

A process for forming a capacitor on an interlayer insulator film, said capacitor being electrically connected to a semiconductor substrate through a contact hole formed through the interlayer insulator film, the process comprising the steps of:

• forming a patterned amorphous silicon film to completely fill said contact hole and to partially cover said interlayer insulator film;
• irradiating a crystal nucleus forming gas onto said patterned amorphous silicon film at a first temperature of at least 530.degree. C. to form crystal nuclei on a surface thereof, wherein the growth rate of crystals at the first temperature, growing from a boundary between said patterned amorphous silicon film and said interlayer insulator film, is lower than a growth rate of the crystals at a second temperature of 600.degree. C. or less and that exceeds said first temperature by at least 5.degree. C. in a succeeding annealing step, wherein before said crystal nucleus forming gas is irradiated onto said amorphous silicon film at said first temperature, said amorphous silicon film is preliminary heated to and maintained at a third temperature which is lower than said first temperature, and thereafter, said amorphous silicon film is heated to and maintained at said first temperature, and said crystal nucleus forming gas is irradiated onto said amorphous silicon film at said first temperature;
• annealing said patterned amorphous silicon film at said second temperature so that hemi-spherical silicon grains are formed from the crystal nuclei over an entire top surface and side surfaces of said patterned amorphous silicon film;
• forming a capacitor dielectric film to cover said hemi-spherical silicon grains;
• and
• forming a capacitor plate to cover said capacitor dielectric film, wherein said capacitor is comprised of said patterned amorphous silicon film having said hemi-spherical silicon grains, said capacitor dielectric film, and said capacitor plate.

A process for forming a capacitor on an interlayer insulator film, said capacitor being electrically connected to a semiconductor substrate through a contact hole formed through the interlayer insulator film, the process comprising the steps of:

• forming a patterned amorphous silicon film to completely fill said contact hole and to partially cover said interlayer insulator film;
• irradiating a crystal nucleus forming gas onto said patterned amorphous silicon film at a first temperature to form crystal nuclei on a surface thereof, wherein the growth rate of crystals at the first temperature, growing from a boundary between said patterned amorphous silicon film and said interlayer insulator film, is lower than a growth rate of the crystals at a second temperature in a succeeding annealing step;
• annealing said patterned amorphous silicon film at an initial temperature equal to said second temperature and a final temperature higher than said initial temperature so that hemi-spherical silicon grains are formed from the crystal nuclei on said surface of said patterned amorphous silicon film;
• forming a capacitor dielectric film to cover said hemi-spherical silicon grains;
• and
• forming a capacitor plate to cover said capacitor dielectric film, wherein said capacitor is comprised of said patterned amorphous silicon film having said hemispherical silicon grains, said capacitor dielectric film, and said capacitor plate.