Method for fabricating a capacitor in a semiconductor device
AssigneeUnited Microelectronics Corp.
InventorsKuo-Tai Huang, Wen-Yi Hsieh, Tri-Rung Yew
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Abstract
A fabricating method of a capacitor includes two gates and a commonly used source/drain region formed on a substrate. Then, a process of sell align contact has been applied to make a pitted self align contact window (PSACW) to partly expose the commonly used source/drain region. Then an glue/barrier layer and a lower electrode of the capacitor are formed over the PSACW. Then a dielectric thin film with a material having high dielectric constant is formed over the lower electrode. Then, an upper electrode is formed over the dielectric thin film to complete a capacitor, which has a structure of metal insulator metal with a shape like the PSACW.
Claims23
A method of fabricating a capacitor, comprising:
- providing a substrate, wherein at least a gate and at least a source/drain region is formed on the substrate, and wherein a spacer is formed at a periphery of the gate and a cap layer is formed at a top of the gate;
- forming an insulating layer over the substrate to at least cover the gate and the source/drain region;
- patterning the insulating layer to form an opening which expose the source/drain region, wherein the opening has a side wall;
- forming a conformal glue/barrier layer on the side wall and coupled to the source/drain region;
- forming a first conformal thin conductive layer on the glue/barrier layer to act as a lower electrode;
- forming a dielectric thin film on the first conductive layer;
- and
- forming a second conductive layer on the dielectric thin film to act as an upper electrode.
Dependencies are inferred from the claim text.