Capacitor, integrated circuitry, diffusion barriers, and method for forming an electrically conductive diffusion barrier

A capacitor comprising:

• an opening extending through an insulative material and to an electrical node;
• a storage electrode comprising Ti, Al, and N and extending into the opening to electrically contact the node;
• a cell plate layer spaced from the storage electrode;
• and
• a dielectric layer between the storage electrode and the cell plate layer.

A capacitor, comprising:

• a substrate having a node to which electrical connection is to be made;
• an insulative layer over the silicon substrate and defining an opening to the node;
• a lower cell plate including a layer comprising Ti, Al and N, and wherein a portion of the lower cell plate is received in the opening and is positioned in conductive electrical connection with the underlying node, and another portion of the lower cell plate is positioned outside of the contact opening;
• a dielectric layer positioned in contact with and covering the entire lower cell plate;
• and
• an upper cell plate positioned over the dielectric layer and having a portion which is positioned in the contact opening and another portion which is positioned outside of the contact opening.

A capacitor, comprising:

• a substrate having a node to which electrical connection is to be made;
• an insulative layer over the substrate and defining an opening to the node;
• a conductive plug received in the opening and positioned in conductive electrical connection with the underlying node;
• a lower electrode positioned outwardly of the insulative layer and in conductive electrical connection with the conductive plug;
• a film comprising Ti, Al, and N positioned on the lower electrode;
• a dielectric layer positioned in contact with and covering the entire lower electrode;
• and
• an upper electrode positioned outwardly of the dielectric layer.

A capacitor, comprising:

• a silicon substrate having diffusion regions and a node to which electrical connection is to be made, and wherein wordlines are formed outwardly of the silicon substrate;
• a layer of silicon dioxide positioned on the silicon substrate and defining a contact opening to the underlying node, and wherein the silicon dioxide is formed in covering relation relative to the wordlines;
• a layer of substantially unoxidized titanium silicide positioned entirely within the contact opening and disposed in conductive electrical connection with the underlying node;
• a substantially unoxidized lower cell plate comprising a layer of Ti.sub.x Al.sub.1-x N, and wherein the "x" lies in a range of about 0.4 to about 0.8, and wherein a portion of the lower cell plate is received in the contact opening and is positioned in conductive electrical connection with the underlying layer of unoxidized titanium silicide, and another portion of the lower cell plate is positioned outside of the contact opening;
• a dielectric layer positioned in contact with and covering the entire lower cell plate;
• and
• an upper cell plate positioned on the dielectric layer and having a portion which is positioned in the contact opening and another portion which is positioned outside of the contact opening.