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US 5,844,295 AGranted
Semiconductor device having a fuse and an improved moisture resistance
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsMasaki Tsukude, Kazutami Arimoto
Life of this patent
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Abstract
An interlayer insulating layer is formed to cover a fuse layer. A concave portion is provided on the surface of interlayer insulating layer located directly above fuse layer. A nitride layer as a passivation layer extends on the sidewalls of concave portion. In this way, a semiconductor device is obtained, the device having an improved moisture resistance, and in which a fuse can be easily blown by laser and a design rule of the region adjacent to the fuse can be improved.
Claims6
A semiconductor device, comprising:
- a fuse layer;
- an interlayer insulating layer formed to cover said fuse layer, provided with a concave portion formed on its surface located directly above said fuse layer which concave portion reduces the thickness of the interlayer insulating layer directly above said fuse layer, and having a first opening width (W1) larger than two-dimensional width of said fuse layer;
- and
- a passivation layer formed to cover said interlayer insulating layer, provided with a first opening exposing a bottom surface of said concave portion located directly above said fuse layer and having a second opening width (W2) smaller than said first opening width (W1).
1 more element
A semiconductor device, comprising:
- a fuse layer;
- an interlayer insulating layer formed to cover said fuse layer, provided with a concave portion formed directly above said fuse layer and having an opening width (W1) larger than the two-dimensional width of said fuse layer which concave portion reduces the thickness of the interlayer insulating layer directly above said fuse layer;
- and
- a passivation layer covering said interlayer insulating layer, extending on sidewalls of said concave portion to reach an edge portion of a bottom surface of said concave portion, and exposing the bottom surface of said concave portion located directly above said fuse layer.
1 more element
A semiconductor device, comprising:
- a fuse layer;
- an interlayer insulating layer formed on a substrate and covering the fuse layer;
- a bonding pad layer formed on a surface of said interlayer insulating layer;
- a first insulating layer covering said interlayer insulating layer, having a first opening which exposes a surface of said bonding pad layer, and having a first relative dielectric constant;
- and
- a second insulating layer covering said first insulating layer and sidewalls of said first opening, having a second opening which exposes a portion of the surface of said bonding pad layer, and having a second relative dielectric constant higher than said first relative dielectric constant, wherein
- the openings in the first and second insulating layers expose the interlayer insulating layer located directly above the fuse layer, said interlayer insulating layer having a concave portion directly above said fuse layer which concave portion reduces the thickness of the interlayer insulating layer directly above said fuse layer, and
- a passivation layer is formed of said first and said second insulating layers.
5 more elements
Dependencies are inferred from the claim text.