Overcurrent protection for an ink-jet printhead
AssigneeXerox Corporation
InventorsJuan J. Becerra, Sophie V. Vandebroek
Life of this patent
Estimating the term…
Abstract
A protection circuit prevents snapback events in MOS transistors associated with semiconductor or micromechanical structures, such as ink-jet ejectors. A bulk electrode associated with the MOS transistor is monitored for unusual high voltages which are consistent with an impending snapback event. The voltage on the bulk electrode is then used to turn on the control transistor which connects the gate of the MOS transistor to ground and thereby protects the device.
Claims3
A semiconductor device providing overcurrent protection, comprising:
- a MOS transistor defining a drain, a source, a gate, and a bulk electrode;
- a control transistor having a base connected to the bulk electrode, the control transistor being configured to connect the gate of the MOS transistor to a safe potential in response to a current of a predetermined magnitude flowing in the bulk electrode of the MOS transistor;
- and
- an AND gate having an input terminal connected to the control transistor and an output terminal connected to the gate of the MOS transistor.
A semiconductor device providing overcurrent protection, comprising:
- a MOS transistor defining a drain, a source, a gate, and a bulk electrode;
- a control transistor having a base connected to the bulk electrode, the control transistor being configured to connect the gate of the MOS transistor to a safe potential in response to a current of a predetermined magnitude flowing in the bulk electrode of the MOS transistor;
- and
- a pullup resistor and a voltage source, the voltage source connected through the pullup resistor to a collector of the control transistor and to the gate of the MOS transistor.
A semiconductor device providing overcurrent protection, comprising:
- a MOS transistor defining a drain, a source, a gate, and a bulk electrode;
- a control transistor having a base connected to the bulk electrode, the control transistor being configured to connect the gate of the MOS transistor to a safe potential in response to a current of a predetermined magnitude flowing in the bulk electrode of the MOS transistor;
- and
- a resettable latch having an input terminal connected to the control transistor and an output terminal connected to the gate of the MOS transistor.
Dependencies are inferred from the claim text.