Semiconductor integrated circuit device having multi-level wiring structure without dot pattern

A semiconductor integrated circuit comprising:

• at least one circuit component forming a part of an integrated circuit;
• and
• a multi-level wiring structure connected to said integrated circuit, and including
• lower-level conductive paths,
• a first inter-level insulating layer covering said lower-level conductive paths and having first through-holes reaching upper surfaces of said lower-level conductive paths,
• first conductive plugs filling said first through-holes so as to be held in contact with said upper surfaces of said lower-level conductive paths and projecting over said first inter-level insulating layer by a certain distance,
• at least one middle-level wiring connected to one of said first conductive plugs so as to form an upper surface substantially coplanar with the upper surface of said one of said first conductive plugs,
• a second inter-level insulating layer covering said at least one middle-level wiring and said first conductive plugs so that said at least one second through-hole and said another of said first conductive plugs are aligned with each other and having at least one second through-hole reaching the upper surface of another of said first conductive plugs,
• at least one second conductive plug filling said at least one second through-hole and held in contact with said upper surface of said another of said first conductive plugs, and
• at least one upper-level wiring formed on said second inter-level insulating layer and held in contact with an upper surface of said at least one second conductive plug.