Driving circuit for electronic semiconductor devices including at least a power transistor

A power integrated circuit, comprising:

• a monolithic semiconductor substrate having a first conductivity type, and having a metallic conductor making ohmic contact to a back surface thereof, and having thereover a first buried layer which has a second conductivity type and is patterned to partially overlie said substrate, and a second buried layer which has said first conductivity type and is patterned to partially overlie said first buried layer, and a first epitaxial layer which has said first conductivity type and is less heavily doped than said second buried layer and overlies portions thereof;
• a buried-emitter power bipolar transistor, comprising
• a portion of said first buried layer which forms a base-collector junction with said substrate and is connected to a base contact,
• and a portion of said second buried layer which overlies said portion of said first buried layer to form an emitter-base junction, and which is connected to an emitter contact;
• and control circuitry comprising at least one first-type insulated-gate field-effect transistor which has source/drain diffusions of said first conductivity type, and one second-type insulated-gate field-effect transistor which has source/drain diffusions of said second conductivity type, interconnected to control said power transistor:
• said first-type transistor being located inside a second-conductivity-type well in said epitaxial layer, and overlying a respective portion of said first buried layer but not overlying any portion of said second buried layer, and
• said second-type transistor being located inside a portion of said epitaxial layer, and overlying said respective portion of said second buried layer and also a respective portion of said first buried layer.

A control circuit for electronic power devices, said control circuit comprising:

• a semiconductor substrate which has been doped by a first dopant type;
• a first epitaxial layer doped by said first dopant type;
• an isolation well doped by a second type of dopant formed therein;
• a first field-effect transistor, which is formed within a first well, doped with said first dopant type and in direct contact with said isolation well;
• a second well, being doped by said second dopant type, which is accommodated in said first well having the active areas of the transistor formed therein;
• wherein no buried layer is present between said first well and said isolation well.

A control circuit for electronic power devices, said control circuit comprising:

• a semiconductor substrate which has been doped by a first dopant type;
• a first epitaxial layer doped by said first dopant type;
• an isolation well doped by a second type of dopant formed therein;
• a first field-effect transistor, which is formed within a first well, doped with said first dopant type and in direct contact with said isolation well;
• at least a second MOS transistor of the P-channel type, in turn accommodated in said isolation well;
• wherein said P-channel MOS transistor is formed within a further well accommodated in said isolation well with a buried layer interposed therebetween;
• and
• wherein no buried layer is present between said first well and said isolation well.