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US 5,705,849 AGranted
Antifuse structure and method for manufacturing it
AssigneeChartered Semiconductor Manufacturing Pte Ltd.
InventorsJiazhen Zheng, Lap Chan
Life of this patent
Estimating the term…
Abstract
An improved antifuse design has been achieved by providing a structure comprising pair of alternating layers of silicon nitride and amorphous silicon sandwiched between two dual damascene connectors. Said structure provides the advantage, over the prior art, that all electrically active surfaces of the fuse structure are planar, so no potential failure spots resulting from surface unevenness can be formed. A process for manufacturing said fuse structure is also provided and involves fewer masking steps than related structures of the prior art.
Claims13
An antifuse structure comprising:
- a first conductive layer;
- a first insulating layer, having an upper and a lower surface, said lower surface being in contact with said first conductive layer;
- a first dual damascene connector in the first insulating layer extending from the upper surface of said first insulating layer to said first conductive layer;
- a first layer of silicon nitride on, and overlapping, said first dual damascene connector;
- a first layer of amorphous silicon on said first layer of silicon nitride;
- a second layer of silicon nitride on said first layer of amorphous silicon;
- a second layer of amorphous silicon on said second layer of silicon nitride;
- a second insulating layer, having an upper and a lower surface, on the upper surface of the first insulating layer and on said second layer of amorphous silicon;
- and
- a second dual damascene connector in the second insulating layer extending from the upper surface of said second insulating layer to said second layer of amorphous silicon.
7 more elements
Dependencies are inferred from the claim text.