Method to make an asymmetrical LDD structure for deep sub-micron MOSFETS

A method of forming a lightly doped source and drain structure in the fabrication of an integrated circuit device comprising:

• providing a polysilicon gate electrode overlying a layer of gate silicon oxide on the surface of a semiconductor substrate;
• oxidizing the surfaces of said gate electrode to form a surface oxide layer;
• forming polysilicon spacers on the sidewalls of said gate electrode wherein one side of said gate electrode is a source side and the opposite side of said gate electrode is a drain side;
• removing said polysilicon spacer on said source side of said gate electrode;
• implanting first ions to form heavily doped source and drain regions within said semiconductor substrate not covered by said gate electrode and said polysilicon spacer on said drain side of said gate electrode;
• removing said drain side polysilicon spacer;
• and
• implanting second ions to form a lightly doped drain region within said semiconductor substrate underlying said removed drain side polysilicon spacer completing the formation of a lightly doped source and drain structure in the fabrication of an integrated circuit device.

A method of forming a lightly doped source and drain structure having minimal source resistance in the fabrication of an integrated circuit device comprising:

• providing a polysilicon gate electrode overlying a layer of gate silicon oxide on the surface of a semiconductor substrate;
• oxidizing the surfaces of said gate electrode to form a surface oxide layer;
• forming polysilicon spacers on the sidewalls of said gate electrode wherein one side of said gate electrode is a source side and the opposite side of said gate electrode is a drain side;
• removing said polysilicon spacer on said source side of said gate electrode;
• implanting first ions to form heavily doped source and drain regions within said semiconductor substrate not covered by said gate electrode and said polysilicon spacer on said drain side of said gate electrode;
• removing said drain side polysilicon spacer;
• and
• implanting second ions to form a lightly doped drain region within said semiconductor substrate underlying said removed drain side polysilicon spacer wherein the presence of a wider heavily doped region on said source side instead of a lightly doped region as on said drain side results in the formation of said lightly doped source and drain structure having minimal source resistance in the fabrication of said integrated circuit device.