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US 5,703,808 AGranted
Non-volatile memory cell and method of programming
AssigneeMotorola, Inc.
InventorsJitendra J. Makwana, Darryl F. Monteilh, Effiong A. Omon
Life of this patent
Estimating the term…
Abstract
The programming time of a non-volatile memory cell (13) is reduced by forming the non-volatile memory cell (13) in a well region (12). The presence of the well region (12) increases the number of electrons that are present in a channel region (14) of the non-volatile memory cell (13). The number of electrons in the channel region (14) is also increased by placing a voltage potential on the well region (12) relative to a source region (15). The voltage differential will inject electrons into the well region (12), which increases the number of electrons in the channel region (14).
Claims31
A method for programming a non-volatile memory cell, the method comprising the steps of:
- providing a non-volatile memory cell, the non-volatile memory cell comprising:
- a) a semiconductor substrate of a first conductivity, the semiconductor substrate having a well region of a second conductivity;
- b) a contact to the well region to provide a voltage potential between the well region and the semiconductor substrate;
- and
- c) wherein the non-volatile memory cell has a floating gate region, a control gate region, and a dielectric layer overlying the well region, and the non-volatile memory cell having a source region, a drain region, and a channel region in the well region, the channel region being between the source region and the drain region;
- placing a first voltage potential on the drain region of the non-volatile memory cell;
- placing a second voltage potential on the source region of the non-volatile memory cell, so that the first voltage potential and the second voltage potential provide a current passing through the channel region of the non-volatile memory cell;
- placing a third voltage potential on the contact to the well region to provide a flow of electrons into the well region from the source region;
- and
- placing a fourth voltage potential on the control gate region of the non-volatile memory cell, the fourth voltage potential directing electrons from the channel region into the floating gate region by hot carrier injection.
7 more elements
A method for programming a non-volatile memory cell comprising the steps of:
- providing an electrically programmable read only memory cell comprising:
- a semiconductor substrate having a well region;
- a source region and a drain region formed in the well region;
- and
- a control gate region, a floating gate region, and a dielectric layer overlying the well region, wherein the dielectric layer is at least 300 angstroms thick;
- placing a first voltage potential on the drain region of the electrically programmable read only memory cell;
- placing a second voltage potential on the source region of the electrically programmable read only memory cell;
- placing a third voltage potential on the well region, wherein the third voltage potential is less than the first voltage potential and the third voltage potential is greater than the second voltage potential;
- and
- programming the electrically programmable read only memory cell by placing a fourth voltage potential on the control gate region of the electrically programmable read only memory cell, the fourth voltage potential directing electrons into the floating gate region.
7 more elements
A non-volatile memory cell comprising:
- a semiconductor substrate having a surface;
- a well region in the semiconductor substrate, the well region contiguous with the surface of the semiconductor substrate;
- a source region and a drain region in the well region;
- a first dielectric layer overlying the surface of the semiconductor substrate, the first dielectric layer being at least 300 angstroms thick;
- a floating gate region overlying the first dielectric layer so that the floating gate region modulates a channel between the source region and the drain region;
- a first electrical contact to the semiconductor substrate;
- a second electrical contact to the well region;
- and
- wherein the first electrical contact and the second electrical contact are electrically isolated such that a first voltage potential can be placed on the well region while a second voltage potential can be placed on the semiconductor substrate.
6 more elements
A non-volatile memory cell comprising:
- a body of semiconductor material;
- a well region formed in the body of semiconductor material;
- a source region and a drain region in the well region, the source region being of a different conductivity than the well region;
- a first dielectric layer overlying the body of semiconductor material, wherein the first dielectric layer covers at least a portion of the well region between the source region and the drain region, the first dielectric layer being at least 350 angstroms thick;
- a floating gate region overlying the first dielectric layer;
- a first electrical contact to the body of semiconductor material;
- and
- a second electrical contact to the well region, the second electrical contact being electrically isolated from the first electrical contact.
5 more elements
Dependencies are inferred from the claim text.