Power semiconductor device

A power semiconductor device having a plurality of circuit elements arranged side by side, each circuit element comprising:

• an emitter layer of a first conductivity type;
• a base layer of a second conductivity type arranged on said emitter layer;
• a base layer of the first conductivity type formed in a surface of said base layer of the second conductivity type;
• a source layer of the second conductivity type formed in a surface of said base layer of the first conductivity type;
• a gate insulating film formed over at least the base layer of the first conductivity type located between the source layer of the second conductivity type and the base layer of the second conductivity type;
• a gate electrode portion arranged on the gate insulating film extending over at least the base layer of the first conductivity type located between said source layer of the second conductivity type and said base layer of the second conductivity type;
• a source electrode portion arranged to be in contact with both said source layer of the second conductivity type and said base layer of the first conductivity type;
• a drain electrode portion arranged to be in contact with said emitter layer of the first conductivity type;
• and
• wherein each said gate electrode portion of at least an adjacent first pair of two of said circuit elements together comprise an integral gate electrode satisfying conditions of 60 .mu.m.ltoreq.L.sub.G /L.sub.S and 1.ltoreq.L.sub.G.sup.2 /(D.sub.B .multidot.W.sub.B).ltoreq.9, where L.sub.G denotes a width of said integral gate electrode, D.sub.B denotes a depth of said base layer of the first conductivity type, W.sub.B denotes a thickness of said base layer of the second conductivity type which is located between said base layer of the first conductivity type and said emitter layer of the first conductivity type, and L.sub.S denotes a distance between one integral gate electrode and an adjacent integral gate electrode.