Buried bit line DRAM cells and fabricating methods therefor
AssigneeSamsung Electronics Co., Ltd.
InventorKang-yoon Lee
Life of this patent
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Abstract
A buried bit line DRAM cell includes an active region having a protruding tap, formed in a semiconductor substrate. A device isolation region is formed in the substrate, outside the active region. A bit line laterally contacts the tap and is buried in the device isolation region. Accordingly, photolithography steps for forming a device isolation film twice and for forming a bit line contact can be omitted, thereby obtaining process simplicity and wider process margins.
Claims12
A method of fabricating an integrated circuit dynamic random access memory (DRAM) cell, comprising the steps of:
- forming a DRAM cell active region in a substrate, said DRAM cell active region including a protruding tap extending therefrom;
- forming a device isolation region in said substrate, outside said DRAM cell active region;
- and
- forming a buried bit line in said device isolation region, which projects through said device isolation region to electrically contact said tap.
A method of fabricating an integrated circuit dynamic random access memory (DRAM) cell, comprising the steps of:
- etching a semiconductor substrate to thereby define a DRAM cell active region in said substrate, including a protruding tap extending therefrom, and a trench in said semiconductor substrate which surrounds said DRAM cell active region including said protruding tap, said trench including a trench sidewall;
- forming a device isolation film on said trench sidewall, said device isolation film exposing said tap;
- and
- forming a conductor in said trench, such that said conductor electrically contacts said tap but is electrically insulated from said DRAM cell active region outside said tap.
A method of fabricating an integrated circuit dynamic random access memory (DRAM) cell, comprising the steps of:
- etching a semiconductor substrate to thereby define a DRAM cell active region in said semiconductor substrate, including a protruding tap extending therefrom, and a first trench in said semiconductor substrate which surrounds said DRAM cell active region including said protruding tap;
- filling said first trench with insulating material;
- forming a second trench in said insulating material, such that said second trench exposes said tap;
- and
- filling said second trench with conductive material to thereby form a bit line which electrically contacts said tap.
Dependencies are inferred from the claim text.