Fabrication process and structure for a contacted-body silicon-on-insulator dynamic random access memory
AssigneeInternational Business Machines Corporation
InventorsGary B. Bronner, John K. DeBrosse, Jack A. Mandelman
Life of this patent
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Abstract
An SOI DRAM includes a direct body contact between the SOI layer and the silicon substrate, and field-shield isolation positioned on the surface of the SOI structure which extends over the direct body contact. Deep trench storage capacitors are positioned adjacent the direct body contact.
Claims13
A body-contacted silicon-on-insulator dynamic random access memory, comprising:
- a substrate including a silicon layer, an insulator layer positioned on said silicon layer, and a silicon-on-insulator layer positioned on said insulator layer;
- a conductive material contacting said silicon-on-insulator layer, said conductive material traversing through said silicon-on-insulator layer and said insulator layer and contacting said silicon layer;
- a field-shield isolation region positioned on a surface of said substrate above said conductive material;
- and
- deep trench storage capacitors formed in said substrate, wherein said deep trench storage capacitors are laterally adjacent and bound side edges of said conductive material contacting said silicon-on-insulator layer and said silicon layer.
A body-contacted silicon-on-insulator dynamic random access memory of claim 10 wherein said silicon layer is a region of doped silicon material located in a surface portion of said substrate, and said conductive material comprises a doped polysilicon layer located above and contacting said silicon layer.
A body-contacted silicon-on-insulator dynamic random access memory , comprising:
- a substrate including a silicon layer an insulator layer positioned on said silicon layer, and a Silicon-on-insulator layer positioned on said insulator layer;
- a conductive material contacting said silicon-on, insulator layer, said conductive material traversing through said silicon-on-insulator layer and said insulator layer and contacting said silicon layer;
- a field-shield isolation region positioned on a surface of said substrate above said conductive material, wherein said field-shield isolation region is P+polysilicon material;
- and
- deep trench storage capacitors formed in said substrate, wherein said conductive material contacting said silicon-on-insulator layer and said silicon layer is located between said deep trench storage capacitors.
Dependencies are inferred from the claim text.