Back to results
US 5,479,041 AGranted
Non-trenched buried contact for VLSI devices
AssigneeUnited Microelectronics Corp.
InventorsWater Lur, D. Y. Wu
Life of this patent
Estimating the term…
Abstract
The invention describes a non-trenched buried contact for local interconnections in VLSI devices and provides a method for forming the non-trenched buried contact. By using trenched isolation and a trench polysilicon gate structure the buried contact process can be implemented so that there are no unwanted trenches formed in the area of the buried contact. The invention permits excellent planarization of the device prior to pre-metal dielectric and metal deposition.
Claims20
A semiconductor device, comprising:
- a semiconductor substrate with source/drain areas;
- isolation trenches filled with isolation dielectric material formed in said semiconductor substrate;
- gate electrode trenches having side walls and bottoms formed in said semiconductor substrate;
- conductor electrode trenches having side walls and bottoms formed in said semiconductor substrate and in said isolation trenches;
- a gate dielectric layer formed on said side walls and said bottoms of said gate electrode trenches, and on said bottoms and the lower part of said side walls of that portion of said conductor electrode trenches formed in said semiconductor substrate;
- a layer of conductive contact material formed on the upper part of said side walls of that portion of said conductor electrode trenches formed in said semiconductor substrate;
- a conductive electrode material filling said gate electrode trenches and said conductor electrode trenches;
- and
- a pre-metal dielectric covering said semiconductor substrate.
6 more elements
Dependencies are inferred from the claim text.