Method of designing cells applicable to different design automation systems

A method of designing first and second cells applicable to different first and second design automation systems as a part of a circuit design, comprising:

• preparing the first cells circuit-designed by the first design automation system and the second cells circuit-designed by second design automation system;
• demarcating each of said first and second cells into a logic function portion and an input/output portion, wherein said logic function portion is responsible for a logic function defined by the circuit design and said input/output portion is responsible for an arrangement of input/output conductors for electrical connection with another cell;
• determining a set of lithography patterns for the input/output portions of said second cells in said second design automation such that said set of lithography patterns is, at its external end, in an arrangement satisfying requirement of said second design automation system and is, at its internal end, in an arrangement satisfying requirement of said first design automation system, respectively;
• and
• attaching said input/output portion of said second cells having said determined set of lithography pattern in said second design automation system to at least one first cell in said first design automation system.

A method of designing first and second cells as a part of circuit design, comprising:

• preparing the first and second cells for which the circuit design has been completed, said first and second cells having an identical number of input/output terminals;
• demarcating each of said first and second cells into a logic function portion and an input/output portion, wherein said logic function portion is responsible for a logic function defined by the circuit design and said input/output portion is responsible for an arrangement of input/output conductors for electrical connection with another cell;
• determining a common lithography pattern for an interface portion including adjoining parts of said logic function portion and said input/output portion of said first and second cells such that said common lithography pattern is shared by said first and second cells;
• and
• determining a set of lithography patterns for each of said logic function portions of said first and second cells.