Interconnect and resistor for integrated circuits

A method of forming a polycrystalline silicon resistive load element in a semiconductor integrated circuit, comprising the steps of:

• forming a lightly doped first conductive layer having a conductivity of a first type;
• forming a first oxide layer over the integrated circuit with a first opening therethrough exposing a portion of the first conductive layer;
• using the first oxide layer as a mask, implanting the exposed portion of the first conductive layer with a dopant of a second conductivity type to form a junction between the exposed portion and the portion covered by the mask;
• depositing an undoped oxide layer over the integrated circuit;
• performing an etchback of the undoped oxide layer to form a sidewall oxide spacer of the sidewall of the first oxide layer;
• and
• forming a silicide over the exposed portion of the first conductive layer.

A method of forming a polycrystalline silicon resistive load element in a semiconductor integrated circuit, comprising the steps of:

• forming a first conductive layer wherein the first conductive layer has a first region of a first conductivity type and a second region of a second conductivity type wherein a junction is formed between the first and the second regions;
• forming a first oxide region over the first region of the first conductive layer and the junction;
• depositing an undoped oxide layer over the integrated circuit;
• patterning and etching the undoped oxide layer to form an undoped oxide region over the first oxide region, the junction and a portion of the first region of the first conductive layer adjacent to the junction;
• and
• forming a silicide region over the second region of the first conductive layer not covered by the undoped oxide layer.

A method of forming a polycrystalline silicon resistive load element in a semiconductor integrated circuit, comprising the steps of:

• forming a lightly doped first conductive layer having a conductivity of a first type;
• forming a first oxide layer over the integrated circuit with a first opening therethrough exposing a portion of the first conductive layer;
• using the first oxide layer as a mask, implanting the exposed portion of the first conductive layer with a dopant of a second conductivity type to form a junction between the exposed portion and the portion covered by the mask;
• depositing an undoped oxide layer over the integrated circuit;
• patterning and etching the undoped oxide layer to again expose an implanted portion of the first conductive layer;
• and
• forming a silicide over the exposed portion of the first conductive layer.