Method for fabricating a BiCMOS device

A method for fabricating a BiCMOS device with a bipolar transistor and NMOS and PMOS transistors, said method comprising the steps of:

• (a) implanting first and second conductivity-type impurity into a substrate to form adjacent first, second and third buried regions therein;
• (b) depositing an epitaxial layer over the substrate after the first, second and third buried regions have been formed;
• (c) implanting first and second conductivity-type impurity into the epitaxial layer at regions overlying the first, second and third buried regions to form a bipolar transistor well, an NMOS transistor well and a PMOS transistor well, one of the NMOS and PMOS transistor wells being disposed between the bipolar transistor well and the other one of the NMOS and PMOS transistor wells;
• (d) growing a silicon dioxide layer over surfaces of the bipolar, NMOS and PMOS transistor wells;
• (e) depositing a silicon nitride layer on the silicon dioxide layer;
• (f) etching the silicon nitride layer in order to expose first isolation regions overlying junctions of the bipolar, NMOS and PMOS transistor wells, and a second isolation region on the surface of the bipolar transistor well adjacent to one of the first isolation regions;
• (g) growing field oxide layers on the first and second isolation regions;
• (h) etching the silicon nitride layer to expose adjacent base oxide regions on the surface of the bipolar transistor well;
• (i) growing base oxide layers on the base oxide regions to define range of an emitter of the bipolar transistor;
• (j) removing the silicon nitride layer and the silicon dioxide layer;
• (k) forming a sacrificial oxide layer over the bipolar, NMOS and PMOS transistor wells;
• (l) forming a deep collector contact of the bipolar transistor in the bipolar transistor well between the second isolation region and the adjacent one of the first isolation regions;
• (m) stripping the sacrificial oxide layer;
• (n) growing a gate oxide layer overlying the surfaces of the bipolar, NMOS and PMOS transistor wells;
• (o) etching the gate oxide layer to expose an intrinsic base region between the base oxide layers on the bipolar transistor well and to reduce thicknesses of opposite portions of the base oxide layers that face one another;
• (p) implanting an impurity into the intrinsic base region so as to form an intrinsic base of the bipolar transistor, the intrinsic base having a base portion between the base oxide layers and a base link portion connected to the base portion and disposed underneath the opposite portions of the base oxide layers;
• (q) depositing a polysilicon layer on the gate oxide layer, and on the intrinsic base region;
• (r) implanting an impurity into the polysilicon layer, and driving in the impurity in the polysilicon layer by high temperature treatment to enable the impurity to diffuse through the polysilicon layer to form an emitter region on the surface of the base portion of the intrinsic base.