Method of manufacturing a semiconductor device having a memory cell and peripheral circuit including forming a first electrode for the capacitor
AssigneeSony Corporation
InventorHideaki Kuroda
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AssigneeSony Corporation
InventorHideaki Kuroda
Estimating the term…
According to this invention, a conductive film for forming a plate electrode of a capacitor constituting a memory cell is patterned in only a memory cell region at first. After the conductive film in a peripheral circuit region is used as a stopper for wet-etching a low-melting insulating film of the peripheral circuit region, the conductive film is patterned using the same mask as the low-melting insulating film or the low-melting insulating film itself as a mask. For this reason, an SiN film formed by a low pressure CVD method is not used as a stopper, and an additional lithographic step is not required. Therefore, while a memory cell region is planarized and the step of the peripheral circuit region is reduced, data retaining characteristics can be improved without increasing the number of steps.
A method of manufacturing a semiconductor memory having a memory cell region and a peripheral circuit region, and a memory cell being constituted by a transistor and a capacitor, comprising the steps of:
A method of manufacturing a semiconductor memory having a memory cell region and a peripheral circuit region, and a memory cell being constituted by a transistor and a capacitor, comprising the steps of:
Dependencies are inferred from the claim text.