Planarization process for IC trench isolation using oxidized polysilicon filler
AssigneeDigital Equipment Corporation
InventorsAndre I. Nasr, Steven S. Cooperman
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AssigneeDigital Equipment Corporation
InventorsAndre I. Nasr, Steven S. Cooperman
Estimating the term…
Disclosed is a method of planarizing the surface of a silicon wafer in integrated circuit manufacture where trench isolation techniques are employed. The trenches and active areas on a semiconductor substrate are conformally coated with a layer of silicon oxide. A layer of patterned polysilicon then is deposited on top of the oxide and etched to create filler blocks in depressions above the trenches. Next, the polysilicon is annealed to thereby fill the trenches with an expanded oxide block. The resulting relatively planar surface then is polished back to the nitride cap, to thereby produce a high degree of planarity across all trench and active area dimensions.
A method of planarizing a face of a semiconductor substrate comprising:
A method of planarizing a face of a silicon substrate comprising:
Dependencies are inferred from the claim text.