ESD protection of output buffers
AssigneeAT&T Bell Laboratories
InventorJuergen Pianka
Life of this patent
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AssigneeAT&T Bell Laboratories
InventorJuergen Pianka
Estimating the term…
A particular electrostatic discharge (ESD) protection problem is faced when only n-channel output transistors are present, since there is no p-n junction that could serve to clamp positive ESD voltages, as would be the case if a p-channel output transistor were present. In the present technique, the output transistor itself is used to conduct the ESD current to a power supply conductor (V.sub.SS). To assist in the turn-on of the n-channel output transistor, a transistor couples the bond pad to the n-tub in which the p-channel pre-driver transistor is formed. Conduction through this transistor raises the n-tub voltage when an ESD event occurs, thereby preventing the p-n junction of the p-channel pre-driver transistor from clamping the turn-on voltage, which would limit the protection obtained by this technique. This technique is especially valuable for SCSI (Small Computer System Interface) chips, since only n-channel output transistors are used. It may also be used in TTL-output buffers, which also use n-channel pull-up and pull-down devices. P-channel devices may be comparably protected.
An integrated circuit having an output transistor having a controlled electrode connected to an output conductor, and protective means for supplying a voltage to the control electrode of said output transistor for causing said output transistor to conduct during an electrostatic discharge event;
An integrated circuit comprising an n-channel output transistor having a drain connected to an output conductor, and protective means for supplying a voltage to the gate of said n-channel output transistor for causing said output transistor to conduct during an electrostatic discharge event;
Dependencies are inferred from the claim text.