Gate controlled avalanche bipolar transistor

A semiconductor device comprising:

• a semiconductor substrate of a first conductivity type, said substrate having a surface and containing a channel region formed in the surface of said substrate, said substrate having a first impurity concentration equal to or greater than 1.times.10.sup.18 cm.sup.-3 and said channel region having a second impurity concentration which is lower than said first impurity concentration;
• source and drain regions of a second conductivity type different from the first conductivity type, with said channel region and said substrate being disposed between said source and drain regions, and said source and drain regions being in contact with said substrate;
• a gate insulating film formed on said channel region;
• a gate electrode formed on said gate insulating film;
• a grounded substrate electrode;
• and a resistance layer formed between said substrate and said substrate electrode so as to be electrically in series with said substrate and said substrate electrode, wherein said device is constructed such that when selected potentials are applied to said source and drain regions and to said gate electrode to place said device into operation, said substrate defines a path for current flow between said source and drain regions, carriers are injected from said source region into said substrate, an impact ionization phenomenon occurs in said substrate at a location in the vicinity of said drain region in order to trigger injection of carriers from said source region into said substrate, and carriers injected from said drain region accumulate in said substrate, due to the presence of said resistance layer, so as to increase the potential of said substrate.