Method of manufacturing a semiconductor device by depositing metal on semiconductor maintained at temperature to form silicide

#The invention relates to a method of manufacturing a semiconductor device comprising a semiconductor body having a surface adjoined by regions of silicon and regions of insulating material, the regions of silicon being provided with a top layer of a metal silicide by depositing metal on the surface and by then heating the semiconductor body to a temperature at which during the deposition the metal silicide is formed by reaction of the metal with the silicon.

#The regions of silicon may be both regions of monocrystalline silicon and regions of polycrystalline silicon. In the first case, they constitute, for example, semiconductor zones of transistors, such as source and drain zones of field effect transistors; in the second case, they constitute, for example, conductor tracks, such as gate electrodes of field effect transistors. Both kinds of regions of silicon may of course also form past of bipolar transistors and of other semiconductor circuit elements. The regions of insulating material may mutually insulate as field oxide regions circuit elements provided in the semiconductor body. They may also constitute, for example, an insulation between gate electrodes and source and drain zones of field effect transistors. They may be made of different materials, such as silicon oxide, silicon nitride, silicon oxynitride, but also, for example, of aluminum oxide.

#By providing the silicon regions with a top layer of a metal silicide, it is achieved inter alia that monocrystalline semiconductor zones can be more readily contacted and that polycrystalline conductor tracks obtain a lower electrical resistance. The regions are provided in the manner described above in a self-registered manner with a top layer of a metal silicide. During the deposition, the metal reacts with silicon, but it will not react with the insulating material. After deposition, the metal can be simply etched away from the regions of insulating material, while the metal silicide is left behind as a top layer on the silicon regions.

#The invention will now be described more fully with reference to a drawing. In the drawing:

#FIGS. 1 and 2 show two stages of manufacture of a semiconductor device, which is obtained by means of the method according to the invention.

#The semiconductor device comprises a semiconductor body 1 having a surface 2, which is adjoined by regions of silicon 3, 4, 5 and 6 and regions of an insulating material 8 and 9. The regions of silicon 3, 4 and 5 consists of monocrystalline silicon. The regions 3 and 4 constitute in this embodiment the source and drain zones of a field effect transistor. Via the region 5, for example, the semiconductor body 1 may be contacted. The region of silicon 6 consists of polycrystalline silicon and constitutes the gate electrode of the field effect transistor, which is insulated by a layer of gate oxide 7 from the part of the semiconductor body 1 located between the source zone and the drain zone 3 and 4, respectively. The regions of insulating material 8 and 9 in this embodiment consists of silicon oxide, but they may also consists of silicon nitride, silicon oxynitride or even of aluminium oxide. The insulating regions 8 insulate as field oxide regions the source and drain zones 3, 4 from the region 5. The insulating regions 9 insulate the gate electrode 6 in lateral direction from the source and drain zones 3 and 4.

#The regions of silicon 3, 4, 5 and 6 are provided with a top layer 10 of a metal silicide by depositing metal on the surface 2 and by then heating the semiconductor body 1 to a temperature at which the metal silicide 10 is formed during the deposition by reaction of the metal with the silicon 3, 4, 5 and 6. The monocrystalline silicon regions 3, 4 and 5 can thus be contacted more satisfactorily and the polycrystalline silicon region 6 thus has a lower electrical resistance.

#The silicon regions 3, 4, 5 and 6 are provided in a self-registered manner with the top layer 10. During the deposition, the metal reacts with silicon, but this will not be the case with the insulating material of the regions 8 and 9. After the top layer 10 has been formed, the metal which has been deposited on the insulating regions 8 and 9 can be simply etched away in a usual manner selectively with respect to the metal silicide formed.