Planar tungsten interconnect with implanted silicon
AssigneeCornell Research Foundation, Inc.
InventorsDavid C. Thomas, S. Simon Wong
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AssigneeCornell Research Foundation, Inc.
InventorsDavid C. Thomas, S. Simon Wong
Estimating the term…
A planar interconnect using selective deposition of a refractory metal such as tungsten into oxide channels is disclosed. A layer of silicon dioxide as thick as the desired tungsten interconnect is placed on the surface of a substrate such as an integrated circuit wafer. Thereafter, a layer of silicon nitride about 100 nm thick is formed on the silicon dioxide. Channels are formed in the silicon dioxide by patterning and etching the composite dielectric layers. After the photoresist is removed, silicon or tungsten atoms at 40 KeV are implanted in the silicon dioxide channels, the silicon nitride acting as a mask. Typically, a dosage as high as 1.times.10.sup.17 cm.sup.-2 is used. The silicon or tungsten implant allows seeding of the tungsten or other retractory metal. The silicon nitride mask is selectively removed by a hot phosphoric acid solution, and a metal film is then selectively deposited to fill the channels in the silicon dioxide layer, which then forms a level of interconnects. The process is repeated to form vias and subsequent levels of interconnects.
A planar interconnect level for VLSI devices, comprising:
A planar interconnect level for VLSI devices, comprising:
Dependencies are inferred from the claim text.