Method of making a self-aligned bipolar using differential oxidation and diffusion
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorTadashi Hirao
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Abstract
A method for manufacturing semiconductor device with improved frequency characteristics is provided. The base resistance and the base-to-collector capacitance are reduced by minimizing a base area and a space between an emitter and the base. The minimization of the base area is brought about by forming the emitter region in the base region by self-aligned process. The minimization of the space between the emitter and the base is accomplished by presenting only an insulator layer between a silicon layer on the emitter region and a metal wiring on the base region.
Claims20
A method for manufacturing a semiconductor device which is formed on a first conductivity type semiconductor substrate and has an emitter, a collector and base regions and is electrically insulated from adjacent semiconductor devices by an isolation region, comprising the steps of:
- (a) forming a multiple layer on a predetermined region of the surface of said semiconductor substrate, said multiple layer including a silicon layer, a nitride layer and an oxide layer which are deposited in their listed sequence;
- (b) side-etching the oxide layer only of said multiple layer such as to recess the oxide layer from the side walls of the nitride layer and the silicon layer;
- (c) forming a first oxide layer in a predetermined region on the semiconductor substrate by selective oxidation using the nitride layer as a mask;
- (d) selectively etching away the nitride layer and the silicon layer by using the side-etched oxide layer as a mask;
- (e) forming a second oxide layer between the silicon layer and the first oxide layer on the surface of said semiconductor substrate by selective oxidation using the selectively etched nitride layer as a mask;
- (f) removing the selectively etched nitride layer to leave the silicon layer exposed;
- (g) introducing a first conductivity type impurity into the silicon layer by using the second oxide layer as a mask;
- (h) removing a portion of the second oxide layer on a section of the base region which is to be an electrode contact portion;
- (i) introducing a second conductivity type impurity into a portion which is to be the base region;
- (j) diffusing the first conductivity impurity from the silicon layer to a portion which is to be the emitter region by heat-treating the semiconductor substrate to form the emitter region and, at the same time, completing the base region;
- (k) forming a third oxide layer on the side-wall and the upper surface of the silicon layer which are connected to the emitter region by conducting low temperature oxidization for the semiconductor substrate;
- and
- (l) forming in the emitter region a window penetrating the third oxide layer, said window being formed in a predetermined portion on the silicon layer, and providing electrode wiring for a base electrode and a collector electrode on predetermined portions of the semiconductor substrate.
The method as recited in any one of the preceding claims wherein the silicon layer is either single-crystalline, poly-crystalline, or amorphous.
A method for manufacturing a semiconductor device which has a collector and an emitter/base region on a first conductivity-type semiconductor substrate, the method comprising the steps of:
- (a) depositing a silicon layer, a nitride layer and a first oxide layer in sequence to form isolated islands on the collector and the base/emitter regions of the surface of said semiconductor substrate;
- (b) selectively side-etching the first oxide layer to recess the oxide layer from the island side walls of the underlying nitride and silicon layers;
- (c) forming a second oxide layer on the semiconductor substrate to isolate the collector and base/emitter islands by selective oxidization using the nitride layer as a mask;
- (d) selectively etching away the nitride layer and the silicon layer to expose the substrate and form a collector contact area in the collector region and an emitter area in the base/emitter region by using the first oxide layer as a mask;
- (e) removing the first oxide layer;
- (f) forming a third oxide layer between the silicon layer in the collector area and the emitter area and the second oxide layer on the surface of the substrate by selective oxidation using the nitride layer as a mask;
- (g) removing the nitride layer to leave the silicon layer exposed;
- (h) implanting a first conductivity type impurity in the silicon layer in the collector contact and the emitter areas using the third oxide layer as a mask;
- (i) removing the third oxide layer to expose the substrate surface in the collector region and the base/emitter region;
- (j) implanting a second conductivity type impurity into the entire surface of the semiconductor device, including the collector contact area, the emitter area and the exposed substrate surface;
- (k) heat-treating the semiconductor substrate to cause the first conductivity impurity to diffuse from the silicon layer in the emitter area into the substrate to form an emitter and to cause the second conductivity type impurity to diffuse from the silicon layer into the substrate in the emitter area to form an active base area under the emitter area and to cause the second conductivity impurity to diffuse into the substrate around the emitter area to form an external base area;
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- (l) forming electrical connections to the silicon layer in the emitter area, to the collector contact area and to the substrate surface in the external base area.
Dependencies are inferred from the claim text.