Patterning method applicable in semiconductor processing

A patterning method for use in a semiconductor production process, the method comprising:

• forming a target layer on a support substrate;
• forming an etch stop layer on the target layer and forming a first mask layer on the etch stop layer;
• patterning the first mask layer to provide a pattern with a two-dimensional array of openings or a modified array obtained by omitting one or more openings from the two-dimensional array;
• performing a first directional etching step selective to the etch stop layer, wherein the first directional etching step enlarges the openings in a first direction to form, in the first mask layer, an array of parallel line-shaped trenches oriented in the first direction;
• forming a second mask layer over the first mask layer;
• patterning the second mask layer according to the pattern of the array of openings;
• performing a second directional etching step selective to the etch stop layer, wherein the second directional etching step enlarges the openings in the second mask layer in a second direction that crosses the first direction, so that the second mask layer is patterned into an array of parallel line-shaped trenches oriented in the second direction, and wherein the second directional etching step removes portions of the first mask layer exposed to etch species applied in the second directional etching step for patterning the first mask layer into a final pattern comprising at least one of an array of pillars or lines;
• removing the second mask layer selectively relative to the at least one of the pillars or lines;
• and
• transferring the pattern provided by the at least one of the pillars or lines to the target layer.