Semiconductor Structure and Method Thereof

A die-to-die input/output integrated circuit (IC) structure, comprising:

• a first transistor over a first electrostatic discharge (ESD) protection circuit region of a substrate;
• a second transistor over a first buffer circuit region of the substrate;
• a third transistor over a second buffer circuit region of the substrate;
• a frontside interconnect structure over the substrate and having a first frontside metal line extending in a first direction and a second frontside metal line extending in a second direction perpendicular to the first direction, wherein the first transistor is coupled to the second and third transistors through the first frontside metal line;
• and
• a backside interconnect structure beneath the substrate, wherein the first transistor is coupled to a backside pad of the backside interconnect structure through the second frontside metal line.

A method of manufacturing a die-to-die input/output integrated circuit (IC) structure, comprising:

• forming a plurality of transistors in a first buffer circuit region, a second buffer circuit region, and an ESD protection circuit region on a substrate, wherein the ESD protection circuit region is between the first buffer circuit region and the second buffer circuit region along a first direction;
• forming a frontside interconnect structure above the substrate, wherein the frontside interconnect structure has a first frontside metal line extending in the first direction and a second frontside metal line extending in a second direction perpendicular to the first direction, and a first transistor of the plurality of transistors in the ESD protection circuit region is electrically connected to a second transistor of the plurality of transistors in the first buffer circuit region and a third transistor of the plurality of transistors in the second buffer circuit region through the first frontside metal line;
• and
• forming a backside interconnect structure below the substrate, wherein the first transistor in the ESD protection circuit region is electrically connected to the backside interconnect structure through the second frontside metal line.