Semiconductor device and manufacturing method thereof

A device comprising:

• a plurality of channel structures stacked over one another;
• a first source/drain epitaxial structure and a second source/drain epitaxial structure connected to the channel structures;
• a gate structure surrounding the channel structures and between the first source/drain epitaxial structure and the second source/drain epitaxial structure;
• and
• a backside source/drain contact extending into the first source/drain epitaxial structure from a backside of the first source/drain epitaxial structure, wherein the backside source/drain contact comprises:
• a first portion extending into the first source/drain epitaxial structure and has a first linear sidewall and a first curved surface;
• and
• a second portion having a second linear sidewall and a second curved surface, wherein the first portion is between the second portion and the first source/drain epitaxial structure, and the second curved surface interconnects the first linear sidewall and the second linear sidewall.

A method comprising:

• forming a transistor over a substrate, wherein the transistor comprises:
• a channel layer over the substrate;
• a gate structure over the substrate and the channel layer;
• and
• a first source/drain epitaxial structure and a second source/drain epitaxial structure on opposite sides of the channel layer;
• thinning down the substrate until a semiconductor base portion of the substrate is exposed;
• performing a first etching process to form a top part of an opening in the semiconductor base portion;
• performing a second etching process to form a bottom part of the opening in the first source/drain epitaxial structure, wherein a tapering gradient of the bottom part of the opening is steeper than a tapering gradient of the top part of the opening;
• and
• forming a backside source/drain contact in the opening.