Back to results
US 2026/0206513 A1Published application
Semiconductor wafer and semiconductor wafer processing method
AssigneeMitsubishi Electric Corporation
InventorsRyo FUNAKI, Noriyuki YABUOSHI
Life of this patent
Estimating the term…
Abstract
A semiconductor wafer according to the present disclosure includes: a plurality of semiconductor devices; a plurality of scribe lines to divide the plurality of semiconductor devices into a plurality of semiconductor chips; and a grinding region provided along an outer peripheral portion and having a depth that is shallower than or the same as depths of the scribe lines.
Claims10
A semiconductor wafer comprising:
- a plurality of semiconductor devices;
- a plurality of scribe lines to divide the plurality of semiconductor devices into a plurality of semiconductor chips;
- and
- a grinding region provided along an outer peripheral portion and having a depth that is shallower than or the same as depths of the scribe lines.
1 more element
Dependencies are inferred from the claim text.