US 2026/0096079 A1Published application

Methods of forming weak sram pfets in mcfets and the structures thereof

AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.

InventorZhi-Chang Lin

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Abstract

A method includes forming a first source/drain recess in a first device region and between first neighboring multilayer stacks, and forming a second source/drain recess in a second device region and between second neighboring multilayer stacks. The first and the second source/drain recesses are formed in a common process. The method further includes forming a first dielectric liner in the second source/drain recess and on surfaces of the second neighboring multilayer stacks, selectively growing a first lower source/drain region in the first source/drain recess, removing the first dielectric liner, and forming a second dielectric liner in the first source/drain recess and on surfaces of the first neighboring multilayer stacks. A second lower source/drain region is grown in the second source/drain recess. The first lower source/drain region and the second lower source/drain region are of a same first conductivity type. The second dielectric liner is then removed.

Claims20

Dependent claims

A method comprising:

forming a first multilayer stack in a first device region;
forming a first dummy gate stack over the first multilayer stack;
forming a second multilayer stack in a second device region;
forming a second dummy gate stack over the second multilayer stack;
etching the first multilayer stack to form a first source/drain recess;
etching the second multilayer stack to form a second source/drain recess;
in a first epitaxy process, forming a first lower source/drain region in the first source/drain recess, wherein the first lower source/drain region is of a first conductivity type, and the forming the first lower source/drain region is free from channel-push processes;
in a second epitaxy process separate from the first epitaxy process, forming a second lower source/drain region in the second source/drain recess, wherein the second lower source/drain region is of the first conductivity type, and wherein the forming the second lower source/drain region comprises a channel-push process;
and
in a third epitaxy process, forming both of a first upper source/drain region in the first source/drain recess and a second upper source/drain region in the second source/drain recess, respectively, wherein the first upper source/drain region and the second upper source/drain region are of a second conductivity type opposite to the first conductivity type.

7 more elements

Dependencies are inferred from the claim text.